Optimized sampling-ISR runtime

Now the pulses of trace #3 are more or less constant ;-)

Much later it came to my mind that calculating _BV(bit) every single time is just stupid, so I distributed the bit shifting to each invocation of the ISR:

static uint8_t bit_value = 1;

if( (bit_value > 0) && (bit_value <= 0x80) ) { // 0x80 = 0b10000000 - read data-bits 0...7
if( (PINA & _BV(PA0)) ) {
soft_uart_rx_byte |= bit_value;
} else {
soft_uart_rx_byte &= ~bit_value;
}
[...]

The compiler is also quite clever in optimizing the first if() statement:

4c4: lds r24, 0x0062
4c8: mov r25, r24
4ca: subi r25, 0x01 ; 1
4cc: sbrc r25, 7
4ce: rjmp .+40 ; 0x4f8

4c4: load 'bit_value' to R24
4c8: move R24 to R25 (to keep R24 safe)
4ca: subtract 1 from R25 <-- this is where the magic happens
4cc: check if BIT7 (MSB) is set in R25, if so SKIP 0x4ce
4ce: jump to 0x4f8

'bit_value' should be a) greater than 0 and b) smaller or equal 128. For an uint8_t that means the following:

a) At least one bit must be set
b) Either the MSB is set, or any combination of the lower bits

Condition a) is almost completely included in b)

Now subtract one.

b) Now only bits 0-6 will be set, bit 7 will have to stay empty !
a) If 'bit_value' started as '0', it would now be 255. the MSB would be set.

The if()-statement is now reduced to a _single_ check if BIT7 is empty.