
Logic Analyzer
Folder: Electronics
07 Jul 2011
Testing the soft-uart receiver on an ATtiny24
It seems to work. Now I only have to make the rest of the code live with it in peace. That doesn't work 100% right now. The LED driver interrupt gets upset sometimes.
The entry points of the pin-change ISR are marked with double-pulses, sampling the data is marked by single pulses. Spikes 2-9: sampling the data byte, spike 1: start bit, spike 10: stop bit, spike 11: hmmmm ?!?
06 Jul 2011
OLS - UART sniffing
Just testing the analyzer a bit.
Unconnected probes pick up noise quite a lot.
06 Jul 2011
Openbench logic sniffer
I ordered it yesterday morning and got it tonight ;-)
06 Jul 2011
OLS - UART decoding
settings: 9600,8,N,1 de.wikipedia.org/wiki/RS-232
"start bit - 01000110 - stop bit" (LSB first!) equals 0x62
The purple-ish markings don't quite fit time-wise. I've put cursors at the byte boundaries.
08 Jul 2011
Preparations for brain surgery
Remember: always, no ALWAYS add some means of getting signals out.
08 Jul 2011
Preparations for brain surgery
Remember: always, no ALWAYS add some means of getting signals out.
17 Jul 2011
Fully interrupt driven soft-uart receiver
By accident I stumbled across my 'system-ticker' interrupt today. As it happens it conveniently ticks at 1MHz! One tick of timer0 is one microsecond. Microsecond timing is exactly what is needed for receiving serial data.
The sampling interrupt (TIM0_COMPA_vect) is now invoked at the right time by setting OCR0A = TCNT0 + FULL_BIT_DELAY.
17 Jul 2011
Fully interrupt driven soft-uart receiver
By accident I stumbled across my 'system-ticker' interrupt today. As it happens it conveniently ticks at 1MHz! One tick of timer0 is one microsecond. Microsecond timing is exactly what is needed for receiving serial data.
The sampling interrupt (TIM0_COMPA_vect) is now invoked at the right time by setting OCR0A = TCNT0 + FULL_BIT_DELAY.
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