Keyword: logic analyzer
Photos
BAD BAD 127 / 128 transition
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Optimized ISR runtime - 8th pulse
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Optimized sampling-ISR runtime
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Optimized ISR runtime - 1st pulse
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1st optimization attempt - 8th pulse
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1st optimization attempt - 1st pulse
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1st optimization attempt
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Starting values - 8th pulse
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Starting values - 1st pulse
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Starting values - overview
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Fully interrupt driven soft-uart receiver
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Fully interrupt driven soft-uart receiver
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Fully interrupt driven soft-uart receiver on an AT…
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Debugging avrdude - arduino.c
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Preparations for brain surgery
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Preparations for brain surgery
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The patient is well again !
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Mental illness in microcontrollers
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