.:madworm:.'s photos with the keyword: sump

No more hick-ups to be found. The solution is 'dirty', but works in this case. As the soft-uart only deals with 9600bps, which is rather slow, I made the pin-change interrupt that samples the byte interruptible. The delays introduced by all the other ISRs are minuscule and don't matter ;-) The other way around would be lethal. What happened: The ISR that deals with the LEDs runs in CTC mode, that is the timer value is reset to zero, once a compare match has occurred. Now if other interrupts delay the invocation of said ISR, the timer will have advanced beyond the usual compare match value and will have to wrap around completely. A 16bit timer will need quite a while in this case (2s). In practice the LEDs will shut off for that period. Ouch.

The top signal shows the premature death of the ATtiny24's TIM1_COMPA_vect. In hindsight the explanation is trivial, but I didn't suspect that cause until very late in the debugging process - as usual.

From top to bottom: a) Interrupt servicing the LED drivers with PWM pulses. It only runs when the edges need to change and takes very little time. But it is crucial that its timing is 100% spot on. b) LED driver enable signal produced by the ISR. c) pin-change interrupt that reads incoming serial data @9600. d) pulses indicate when the bit are sampled, which is tuned by inserting fixed delays. e) incoming serial data. f) status LED showing something I can't remember right now.

Remember: always, no ALWAYS add some means of getting signals out.

Remember: always, no ALWAYS add some means of getting signals out.