.:madworm:.'s photos with the keyword: OLS

No more hick-ups to be found. The solution is 'dirty', but works in this case. As the soft-uart only deals with 9600bps, which is rather slow, I made the pin-change interrupt that samples the byte interruptible. The delays introduced by all the other ISRs are minuscule and don't matter ;-) The other way around would be lethal. What happened: The ISR that deals with the LEDs runs in CTC mode, that is the timer value is reset to zero, once a compare match has occurred. Now if other interrupts delay the invocation of said ISR, the timer will have advanced beyond the usual compare match value and will have to wrap around completely. A 16bit timer will need quite a while in this case (2s). In practice the LEDs will shut off for that period. Ouch.

The top signal shows the premature death of the ATtiny24's TIM1_COMPA_vect. In hindsight the explanation is trivial, but I didn't suspect that cause until very late in the debugging process - as usual.

From top to bottom: a) Interrupt servicing the LED drivers with PWM pulses. It only runs when the edges need to change and takes very little time. But it is crucial that its timing is 100% spot on. b) LED driver enable signal produced by the ISR. c) pin-change interrupt that reads incoming serial data @9600. d) pulses indicate when the bit are sampled, which is tuned by inserting fixed delays. e) incoming serial data. f) status LED showing something I can't remember right now.

All the data

Drilling down...

Drilling down...

Drilling down... BTW, I was just zooming in. All the data comes from the same scan.

The moving average spikes... this is visible as a bright flash ;-( Very bad when fading - and that is the whole purpose of this exercise. www.picbasic.co.uk/forum/showthread.php?t=7393 www.picbasic.co.uk/forum/showthread.php?t=10564

I ordered it yesterday morning and got it tonight ;-)

It seems to work. Now I only have to make the rest of the code live with it in peace. That doesn't work 100% right now. The LED driver interrupt gets upset sometimes. The entry points of the pin-change ISR are marked with double-pulses, sampling the data is marked by single pulses. Spikes 2-9: sampling the data byte, spike 1: start bit, spike 10: stop bit, spike 11: hmmmm ?!?

settings: 9600,8,N,1 de.wikipedia.org/wiki/RS-232 "start bit - 01000110 - stop bit" (LSB first!) equals 0x62 The purple-ish markings don't quite fit time-wise. I've put cursors at the byte boundaries.

Now fully assembled. Works ok for me up to 100MHz + RLE. 200MHz sampling rate + RLE needs stronger pull-down resistors. With RLE turned off the 'noise' on unused channels creeping over from a used one is tolerable (for me at least). A very interesting discussion about the problem this board tries to solve.

Now fully assembled. Works ok for me up to 100MHz + RLE. 200MHz sampling rate + RLE needs stronger pull-down resistors. With RLE turned off the 'noise' on unused channels creeping over from a used one is tolerable (for me at least).

It turned out that the pull-down option worked best with 10k resistors, so this is a smaller board with just that.

It turned out that the pull-down option worked best with 10k resistors, so this is a smaller board with just that.

I'm still experimenting with the size of the resistors. 10k pull down seems to work reliable, whereas 10k is only good at 5V/3.3V pull-up voltage, 2.5V needs close to 4k to work reliably. Works with the openbench logic sniffer by dangerousprototypes.com

I'm still experimenting with the size of the resistors. 10k pull down seems to work reliable, whereas 10k is only good at 5V/3.3V pull-up voltage, 2.5V needs close to 4k to work reliably. Works with the openbench logic sniffer by dangerousprototypes.com

I'm still experimenting with the size of the resistors. 10k pull down seems to work reliable, whereas 10k is only good at 5V/3.3V pull-up voltage, 2.5V needs close to 4k to work reliably.